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september 2013 rev 2 1/37 1 VND5E025LK-E double channel high side driv er with analog current sense for automotive applications features ? general ? inrush current active management by power limitation ? very low stand-by current ? 3.0v cmos compatible inputs ? optimized electromagnetic emissions ? very low electromagnetic susceptibility ? in compliance with the 2002/95/ec european directive ? very low current sense leakage ? diagnostic functions ? proportional load current sense ? high current sense precision for wide currents range ? current sense disable ? off state open load detection ? output short to v cc detection ? overload and short to ground (power limitation) indication ? thermal shutdown indication ?protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? over-temperature shutdown with autorestart (thermal shutdown) ? reverse battery protected (see figure 32 ) ? electrostatic discharge protection application ? all types of resistive, inductive and capacitive loads ? suitable as led driver description the VND5E025LK-E is a double channel high- side drivers manufactured in the st proprietary vipower m0-5 technology and housed in the tiny powersso-24 package. the VND5E025LK-E is designed to drive 12v automotive grounded loads delivering protection, diagnostics and easy 3v and 5v cmos compatible interface with any microcontroller. the device integrates advanced protective functions such as load cu rrent limitation, inrush and overload active management by power limitation, over-temper ature shut-off with auto-restart and over-voltage active clamp. a dedicated analog current sense pin is associated with every output channel in order to provide ehnanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, over- temperature indication, short-circuit to vcc diagnosis and on & off state open load detection. the current sensing and diagnostic feedback of the whole device can be disabled by pulling the cs_dis pin high to allow sharing of the external sense resistor with other similar devices. max transient supply voltage v cc 41 v operating voltage range v cc 4.5 to 28 v max on-state resistance (per ch.) r on 25 m ? current limitation (typ) i limh 42 a off state supply current i s 2 a (1) 1. typical value with all loads connected. powersso-24 www.st.com
contents VND5E025LK-E 2/37 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.5 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24 3.1.1 solution 1 : resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . 24 3.1.2 solution 2 : diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . 25 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.4 current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.4.1 short to vcc and off state open load detection . . . . . . . . . . . . . . . . . . . 27 3.5 maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . . . . . . . 28 4 package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.1 powersso-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.2 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.3 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
VND5E025LK-E list of tables 3/37 list of tables table 1. pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unuse d and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc = 13v; tj = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. current sense (8v < vcc < 18v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 10. openload detection (8v < vcc < 18v). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 12. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 13. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 14. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 16. powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 17. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
list of figures VND5E025LK-E 4/37 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. current sense delay characteristic s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 5. openload off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. delay response time between rising edge of ouput current and rising edge of current sense (cs enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. i out /i sense vs. i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. maximum current sense ratio drift vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 12. overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 13. intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 14. off-state open load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 9 figure 15. short to v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 16. t j evolution in overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 17. off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 18. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 19. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 20. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 21. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 22. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 23. on state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 24. on state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 25. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. ilimh vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 27. turn- on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 28. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 29. cs_dis high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 30. cs_dis low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 31. cs_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 32. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 33. current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 34. maximum turn off current versus inductance (for each cha nnel) . . . . . . . . . . . . . . . . . . . . 28 figure 35. powersso-24 pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 36. rthj-amb vs pcb copper area in open box free air condition ( one channel on). . . . . . . . 29 figure 37. powersso-24 thermal impedance junction to ambient single pulse (one channel on). . . 30 figure 38. thermal fitting model of a double channel hsd in powersso-24 . . . . . . . . . . . . . . . . . . . 30 figure 39. powersso-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 40. powersso-24 tube shipment (no su ffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 41. powersso-24 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
VND5E025LK-E block diagram and pin description 5/37 1 block diagram and pin description figure 1. block diagram table 1. pin functions name function v cc battery connection. output 1,2 power output. gnd ground connection. must be reverse battery protected by an external diode / resistor network. input 1,2 voltage controlled input pin with hyst eresis, cmos compatible. controls output switch state. current sense 1,2 analog current sense pin; delivers a current proportional to the load current. cs_dis active high cmos compatible pin to disable the current sense pin. v cc ch 1 control & diagnostic 1 logic driver v on limitation current limitation power clamp off st ate open l oad over temp. undervoltage v senseh current sense ch 2 overload protection (active power limitation) in1 in2 cs1 cs2 cs_ dis gnd out2 out1 signal clamp control & diagnostic channels 2
block diagram and pin description VND5E025LK-E 6/37 figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input cs_dis floating not allowed x x x x to ground through 1k ? resistor x through 22k ? resistor through 10k ? resistor through 10k ? resistor 1 2 3 4 5 6 n.c. input1 gnd v cc n.c. input2 7 8 9 10 11 12 cs_dis. v cc current sense1 n.c. n.c. current sense2 24 23 22 21 20 19 output2 output2 output2 output2 output2 output2 18 17 16 15 14 13 output1 output1 output1 output1 output1 output1 tab = v cc
VND5E025LK-E electrical specification 7/37 2 electrical specification figure 3. current and voltage conventions note: v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to the conditions in table below for extended periods may affect device relia bility. refer also to the stmi croelectronics sure program and other relevant quality document. v fn i s i gnd v cc v cc v sense2 output1 i out1 current i sense1 input1 i in1 v in2 v out2 gnd cs_dis i csd v csd input2 i in2 v in1 sense1 output2 i out2 current i sense2 sense2 v sense1 v out1 table 3. absolute maximum ratings symbol parame ter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 0.3 -i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a - i out reverse dc output current 24 i in dc input current -1 to 10 ma i csd dc current sense disable input current -i csense dc reverse cs pin current 200 v csense current sense maximum voltage v cc - 41 to +v cc v
electrical specification VND5E025LK-E 8/37 2.2 thermal data e max maximum switching energy (single pulse) (l = tbd; r l =0 ? ; v bat = 13.5v; t jstart = 150c; i out = i liml (typ.) ) 70 mj v esd electrostatic discharge (human body model: r = 1.5 k ? ; c = 100 pf) - input - current sense - cs_dis - output - v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature - 40 to 150 c t stg storage temperature - 55 to 150 table 3. absolute maximum ratings (continued) symbol parame ter value unit table 4. thermal data symbol parameter m ax. value unit r thj-case thermal resistance junction-case (with one channel on) 1.35 c/w r thj-amb thermal resistance junction-ambient see figure 36
VND5E025LK-E electrical specification 9/37 2.3 electrical characteristics values specified in this section are for 8v electrical specification VND5E025LK-E 10/37 table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in =0.9v 1 a v ih input high level voltage 2.1 v i ih high level input current v in =2.1v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in =1ma 5.5 7 i in = -1ma -0.7 v csdl cs_dis low level voltage 0.9 i csdl low level cs_dis current v csd =0.9v 1 a v csdh cs_dis high level voltage 2.1 v i csdh high level cs_dis current v csd =2.1v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis clamp voltage i csd =1ma 5.5 7 i csd =-1ma -0.7 table 8. protections and diagnostics (1) 1. to ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. symbol parameter test cond itions min. typ. max. unit i limh dc short circuit current v cc = 13v 30 42 60 a 5v < v cc < 28v i liml short circuit current during thermal cycling v cc = 13v; t r VND5E025LK-E electrical specification 11/37 table 9. current sense (8v < v cc < 18v) symbol parameter test conditions min. typ. max. unit k led i out /i sense i out = 0.05a; v sense =0.5v; v csd =0v; t j = -40c to 150c 1240 3350 4960 k 0 i out /i sense i out =0.5a; v sense = 0.5v; v csd =0v; t j = -40c to 150c 1860 3150 4600 k 1 i out /i sense i out =2 a; v sense =4 v; v csd =0v; t j = -40c to 150c t j = 25c to 150c 2100 2250 3100 3100 4400 3850 dk 1 /k 1 (1) current sense ratio drift i out =2 a; v sense =4 v; v csd =0v; t j = -40c to 150c -13 13 % k 2 i out /i sense i out =3 a; v sense =4v; v csd =0v; t j = -40c to 150c t j = 25c to150c 2200 2450 3000 3000 4100 3550 dk 2 /k 2 (1) current sense ratio drift i out =3 a; v sense =4v; v csd =0v; t j = -40c to 150c -12 12 % k 3 i out /i sense i out =10 a; v sense =4v; v csd =0v; t j = -40c to 150c t j = 25c to 150c 2550 2650 2850 2850 3280 3180 dk 3 /k 3 (1) current sense ratio drift i out =10 a; v sense =4v; v csd =0v; t j = -40c to 150c -6 +6 % i sense 0 analog sense leakage current i out =0a; v sense =0v; v csd =5v; v in =0v; t j = -40c to 150c 01 a i out =0a; v sense =0v; v csd =0v; v in =5v; t j = -40c to 150c 02 i out =2a; v sense =0v; v csd =5v; v in =5v; t j = -40c to 150c 01 i ol openload on state current detection threshold v in = 5v, 8v electrical specification VND5E025LK-E 12/37 t dsense1h delay response time from falling edge of cs_dis pin v sense <4v, 0.5 VND5E025LK-E electrical specification 13/37 figure 4. current sense delay characteristics figure 5. openload off-state delay timing figure 6. switching characteristics sense current input load current cs_dis t dsense2h t dsense2l t dsense1l t dsense1h v in v cs t dstkon output stuck to v cc v out > v ol v senseh v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff
electrical specification VND5E025LK-E 14/37 figure 7. delay response time between ri sing edge of ouput current and rising edge of current sense (cs enabled) figure 8. output voltage drop limitation v in i out i sense i outmax i sensemax 90% i sensemax 90% i outmax ? t dsense2h t t t v on i out v cc -v out t j = 150 o c t j =25 o c t j =-40 o c v on /r on(t)
VND5E025LK-E electrical specification 15/37 figure 9. i out /i sense vs. i out figure 10. maximum current sense ratio drift vs. load current note: parameter guaranteed by design; it is not tested. 1200 1700 2200 2700 3200 3700 4200 4700 2345678910 i out (a) i out / i sense max tj = -40 c to 150 c max tj = 25 c to 150 c min tj = 25 c to 150 c min tj = -40 c to 150 c typical value -20 -15 -10 -5 0 5 10 15 20 2345678910 i out (a) dk/k(%)
electrical specification VND5E025LK-E 16/37 table 11. truth table conditions input output sense (v csd =0v) (1) 1. if the v csd is high, the sense output is at a high impedance, its potential depends on leakage currents and external circuit. normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overload h h x (no power limitation) cycling (power limitation) nominal v senseh short circuit to gnd (power limitation) l h l l 0 v senseh open load off state (with external pul up) lhv senseh short circuit to v cc (external pull up disconnected) l h h h v senseh < nominal negative output voltage clamp ll0
VND5E025LK-E electrical specification 17/37 table 12. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5v except for pulse 5b. number of pulses or test times burst cycle / pulse repetition time delays and impedance iii iv min. max. 1 -75v -100v 5000 pulses 0.5s 5s 2 ms, 10 ? 2a +37v +50v 5000 pulses 0.2s 5s 50s, 2 ? 3a -100v -150v 1h 90ms 100ms 0.1s, 50 ? 3b +75v +100v 1h 90ms 100ms 0.1s, 50 ? 4 -6v -7v 1 pulse 100ms, 0.01 ? 5b (2) 2. valid in case of external load dump clamp: 40v maximum referred to ground. +65v +87v 1 pulse 400ms, 2 ? table 13. electrical transient requirements (part 2) iso 7637-2: 2004e test pulse test level results iii vi 1c c 2a c c 3a c c 3b c c 4c c 5b (1) 1. valid in case of external load dump clamp: 40v maximum referred to ground. cc table 14. electrical transient requirements (part 3) class contents c all functions of the device performed as designed after exposure to disturbance. e one or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to prop er operation without replacing the device.
electrical specification VND5E025LK-E 18/37 2.4 waveforms figure 11. normal operation figure 12. overload or short to gnd i out v sense v cs_dis input nominal load nominal load normal operation power limitation i limh > i liml > i out v sense v cs_dis input thermal cycling overload or short to gnd
VND5E025LK-E electrical specification 19/37 figure 13. intermittent overload figure 14. off-state open load with external circuitry i out v sense v cs_dis input i limh > nominal load intermittent overload i liml > overload v senseh > input off-state open load with external circuitry v ol i out v sense v cs_dis v out v out > v ol t dstk(on) v senseh >
electrical specification VND5E025LK-E 20/37 figure 15. short to v cc figure 16. t j evolution in overload or short to gnd t dstk(on) v out > v ol resistive short to v cc hard short to v cc short to v cc i out v cs_dis v out v ol t dstk(on) t tsd t r t j evolution in overload or short to gnd i limh > < i liml t j_start t hyst power limitation self-limitation of fast thermal transients input i out t j
VND5E025LK-E electrical specification 21/37 2.5 electrical char acteristics curves figure 17. off state output current figure 18. high level input current -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 100 200 300 400 500 600 700 800 900 1000 iloff (na) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 iih (a) vin = 2.1v v cc = 8 v figure 19. input clamp voltage figure 20. input high level -50 -25 0 25 50 75 100 125 150 175 tc (c) 5 5,2 5,4 5,6 5,8 6 6,2 6,4 6,6 6,8 7 vicl (v) lin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vih (v) figure 21. input low level figure 22. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1 vihyst (v)
electrical specification VND5E025LK-E 22/37 figure 23. on state resistance vs t case figure 24. on state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 10 20 30 40 50 60 70 ron (mohm) iout= 3a vcc=13v 0 5 10 15 20 25 30 35 40 vcc (v) 0 10 20 30 40 50 60 ron (mohm) tc=-40c tc=25c tc=125c tc=150c figure 25. undervoltage shutdown figure 26. i limh vs t case -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 2 4 6 8 10 12 14 16 vusd (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 40 45 50 55 60 65 70 ilimh (a) vcc=13v figure 27. turn- on voltage slope figure 28. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 100 200 300 400 500 600 700 (dvout/dt )on (v/ms) vcc=13v ri=4.3 ohm -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 100 200 300 400 500 600 (dvout/dt )off (v/ms) vcc=13v ri= 4.3 ohm
VND5E025LK-E electrical specification 23/37 figure 29. cs_dis high level voltage figure 30. cs_dis low level voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vcsdh (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 vcsdl (v) figure 31. cs_dis clamp voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 8 9 10 vcsdcl(v) icsd = 1 ma
application information VND5E025LK-E 24/37 3 application information figure 32. application schematic note: channel 2 has the same internal circuit as channel 1. 3.1 gnd protection network against reverse battery this section provides two so lutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1 : resistor in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd ? 600mv / (i s(on)max ) 2. r gnd ???? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: equation 1 p d = (-v cc ) 2 /r gnd v cc gnd output d gnd r gnd d ld ? cu +5v v gnd cs_dis input r prot r prot current sense r sense r prot c ext
VND5E025LK-E application information 25/37 this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how many devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggests to utilize section 3.1.2: solution 2 : diode (dgnd) in the ground line . 3.1.2 solution 2 : diode (d gnd ) in the ground line a resistor (r gnd =1k ??? should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the gro und network will produce a shift ( ? 600mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shif t will not vary if more than one hs d shares the same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transie nt suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2: 2004(e) table. 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of c i/os: equation 2 -v ccpeak /i latchup ? r prot ? (v oh ? c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v; i latchup ? 20ma; v ohc ? 4.5v 5k ? ? r prot ? 180k ? recommended values: r prot =10k ? , c ext =10nf.
application information VND5E025LK-E 26/37 3.4 current sense and diagnostic the current sense pin performs a double function (see figure 33: current sense and diagnostic ): ? current mirror of the load cu rrent in normal operation, delivering a current proportional to the load one according to a know ratio k x . the current i sense can be easily converted to a voltage v sense by means of an external resistor r sense . linearity between i out and v sense is ensured up to 5v minimum (see parameter v sense in table 9: current sense (8v < vcc < 18v) ). the current sense accuracy depends on the output current (refer to current sense electrical characteristics table 9: current sense (8v < vcc < 18v) ). ? diagnostic flag in fault conditions , delivering a fixed voltage v senseh up to a maximum current i senseh in case of the following fault conditions (refer to table 11: truth table ): ? power limitation activation ? over-temperature ? short to v cc in off state ? open load in off state with additional external components. a logic level high on cs_dis pin sets at the same time all the current sense pins of the device in a high impedance state, thus di sabling the current monitoring and diagnostic detection. this feature allows multiplexing of the microcontr oller analog inputs by sharing of sense resistance and adc line among different devices. figure 33. current sense and diagnostic main mosn 41v outn i loff2r r sense r prot to uc adc r pd r pu v pu pwr_lim v sense pu_cmd overtemperature ol off + - v ol current sensen i out /k x i senseh v bat i loff2f v senseh load inputn v cc gnd cs_dis
VND5E025LK-E application information 27/37 3.4.1 short to v cc and off state ope n load detection short to v cc a short circuit between v cc and output is indicated by the relevant current sense pin set to v senseh during the device off state. small or no current is delivered by the current sense during the on state depending on the nature of the short circuit. off state open load with external circuitry detection of an open load in off mode requires an external pull-up resistor r pu connecting the output to a positive supply voltage v pu . it is preferable v pu to be switched off during the module stand-by mode in order to avoid the overall stand-by current consumption to increas e in normal conditions, i.e. when load is connected. an external pull down resistor r pd connected between output and gnd is mandatory to avoid misdetection in case of floating outputs in off state (see figure 33: current sense and diagnostic ). r pd must be selected in order to ensure v out < v olmin unless pulled up by the external circuitry: equation 3 r pd ?? 22 ? k ?? is recommended. for proper open load detection in off state, the external pull-up resistor must be selected according to the following formula: equation 4 for the values of v olmin ,v olmax , i l(off2)r and i l(off2)f see table 10: openload detection (8v < vcc < 18v) . v v i r v ol f off l pd off up pull out 2 min ) 2 ( _ ? ? ? ? ? v v r r i r r v r v ol pd pu r off l pd pu pu pd on up pull out 4 max ) 2 ( _ ? ? ? ? ? ? ? ? ?
application information VND5E025LK-E 28/37 3.5 maximum demagnetization energy (v cc =13.5v) figure 34. maximum turn off current versus inductance (for each channel) note: values are generated with r l =0 ?? in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. 1 10 100 0,1 1 10 100 l (mh) i (a) demagnetization demagnetization demagnetization t v in , i l c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse a b c
VND5E025LK-E package and thermal data 29/37 4 package and thermal data 4.1 powersso-24 thermal data figure 35. powersso-24 pc board note: layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area = 77mm x 86mm, pcb thickness = 1.6mm, cu thickness = 70m (front and back side), copper areas: from minimum pad layout to 8cm 2 ). figure 36. r thj-amb vs pcb copper area in open box free air condition ( one channel on) 30 35 40 45 50 55 0246810 rthj_amb(c/w) pcb cu heatsink area (cm^2)
package and thermal data VND5E025LK-E 30/37 figure 37. powersso-24 thermal impedance junction to ambient single pulse (one channel on) equation 5: pulse calculation formula: where ? = t p /t figure 38. thermal fitting model of a double channel hsd in powersso-24 (a) 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zth (c/w) footprint 8 cm 2 2 cm 2 z th ? r th ? z thtp 1 ? ? ?? + ? =
VND5E025LK-E package and thermal data 31/37 a. the fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. table 15. thermal parameters area/island (cm 2 )footprint 2 8 r1 (c/w) 0.28 r2 (c/w) 0.9 r3 (c/w) 6 r4 (c/w) 7.7 r5 (c/w) 9 9 8 r6 (c/w) 28 17 10 r7 (c/w) 0.28 r8 (c/w) 0.9 c1 (w.s/c) 0.001 c2 (w.s/c) 0.003 c3 (w.s/c) 0.025 c4 (w.s/c) 0.75 c5 (w.s/c) 1 4 9 c6 (w.s/c) 2.2 5 17 c7 (w.s/c) 0.001 c8 (w.s/c) 0.003
package and packing information VND5E025LK-E 32/37 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack? packages, depending on their le vel of environmental compliance. ecopack? specifications, grade definitions a nd product status are available at: www.st.com . ecopack? is an st trademark. 5.2 package mechanical data figure 39. powersso-24 package dimensions
VND5E025LK-E package and packing information 33/37 table 16. powersso-24 mechanical data (1) (2) 1. no intrusion allowed inwards the leads. 2. flash or bleeds on ex posed die pad shall not exceed 0.5 mm per side symbol millimeters min. typ. max. a 2.45 a2 2.15 2.35 a1 0 0.1 b0.33 0.51 c0.23 0.32 d (3) 3. ?d and e? do not include mold flash or protusions. mold flash or protusions s hall not exceed 0.15 mm per side 10.10 10.50 e (3) 7.40 7.60 e0.8 e3 8.8 f2.3 g 0.1 h 10.1 10.5 h 0.4 k0 8 l0.6 1 o1.2 q0.8 s2.9 t3.65 u1.0 n 10 x4.1 4.7 y6.5 7.1
package and packing information VND5E025LK-E 34/37 5.3 packing information figure 40. powersso-24 tube shipment (no suffix) figure 41. powersso-24 tape and reel shipment (suffix ?tr?) a c b all dimensions are in mm. base qty 49 bulk qty 1225 tube length (0.5) 532 a 3.5 b 13.8 c (0.1) 0.6 base qty 1000 bulk qty 1000 a (max) 330 b (min) 1.5 c (0.2) 13 f 20.2 g (+2 / -0) 24.4 n (min) 100 t (max) 30.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 (0.1) 4 component spacing p 12 hole diameter d (0.05) 1.55 hole diameter d1 (min) 1.5 hole position f (0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 (0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets sealed with cover tape. user direction of feed
VND5E025LK-E order codes 35/37 6 order codes table 17. device summary package order codes tube tape & reel powersso-24 VND5E025LK-E vnd5e025lktr-e
revision history VND5E025LK-E 36/37 7 revision history table 18. document revision history date revision changes 17-mar-2009 1 initial release. 18-sep-2013 2 updated disclaimer.
VND5E025LK-E 37/37 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particul ar purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ? automotive, automotive safe ty or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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